LogicWorks | A9451A139CB153CAFDFE71A014A54C51D0E3DCD7

LogicWorks

Name	LogicWorks 5	DOWNLOAD Copy Link
Total Size	25.6 MB
Total Files	299
Hash	A9451A139CB153CAFDFE71A014A54C51D0E3DCD7

/Documentation/
LogicWorks 5 Reference.pdf	6.6 MB
LogicWorks 5 Version History.txt	10.1 KB
About LogicWorks 5.txt	2.3 KB
LogicWorks 5 Help.lnk	1.1 KB
/Libs/
7400.CLF	3.9 MB
Discretes.CLF	95.9 KB
Simulation Logic.clf	58.9 KB
Simulation Gates.clf	31.7 KB
VHDLPrims.clf	22.5 KB
Simulation IO.clf	21.1 KB
Spice.CLF	17.9 KB
Pseudo Devices.CLF	4.7 KB
Connectors.CLF	3.6 KB
/
OT802as.dll	1.6 MB
system.dll	1.2 MB
System.old	1.2 MB
MFC71.dll	1.1 MB
MFC42.DLL	995.4 KB
msvcp71.dll	499.7 KB
sfl202as.dll	405.5 KB
XGridCtrl.ocx	376.8 KB
msvcr71.dll	348.2 KB
msvcrt.dll	290.9 KB
vc6-re200l.dll	282.6 KB
cmax101.dll	180.2 KB
RWUXThemeS.dll	69.6 KB
LogicWorks.exe	49.2 KB
XTX400.tlb	42.3 KB
uninstal.log	16.8 KB
LW.ini.bak	8.8 KB
lw.INI	8.8 KB
lwstate.ini	0.2 KB
/Tools/
Drawing.dwx	1.2 MB
DevEditor.dwx	413.7 KB
VHSim.dwx	352.3 KB
Simulator.dwx	323.6 KB
VTiming.dwx	229.4 KB
Export.dwx	217.1 KB
Librarian.dwx	180.2 KB
pla.dwx	172.0 KB
TestPanel.dwx	94.2 KB
IOPanel.dwx	73.7 KB
/Documentation/Help Files/
ROBOEX32.DLL	1.1 MB
USINGLW5.HLP	1.0 MB
UsingLW5.cnt	1.1 KB
/Examples/
6809.cct	99.9 KB
Colours.cct	55.3 KB
74181 ALU.CCT	40.0 KB
RAM Test.CCT	36.2 KB
Primitive Devices.CCT	29.0 KB
Count8.cct	20.1 KB
5-Minute Example.CCT	18.6 KB
Simulate.CCT	18.5 KB
PROM Example.cct	15.8 KB
3-bit Counter.cct	13.5 KB
4-bit Bus.CCT	10.4 KB
Big Ring.CCT	10.1 KB
Spice Example.cct	8.2 KB
Simulator Batch Test.txt	1.6 KB
COUNT8.dwv	0.6 KB
prom_intel.hex	0.1 KB
prom_raw.hex	0.0 KB
/Data Files/
symbol gallery.clf	85.3 KB
/Examples/VHDL/6502/
6502test.dwv	26.7 KB
din_le_rom.dwv	16.1 KB
addr_op_rom.dwv	13.5 KB
rd_en_rom.dwv	10.1 KB
pc_op_rom.dwv	10.0 KB
roms.dwv	9.3 KB
done_rom.dwv	8.3 KB
flag_op_rom.dwv	7.2 KB
microcode.dwv	7.1 KB
alu_op_rom.dwv	6.6 KB
ALU1_rom.dwv	5.2 KB
6502test.drr	5.1 KB
DINT1_OP_rom.dwv	5.0 KB
alu2_rom.dwv	4.9 KB
dout_op_rom.dwv	3.2 KB
A_LE_rom.dwv	3.2 KB
mc_rom.dwv	1.9 KB
DINT3_OP_rom.dwv	1.8 KB
sp_op_rom.dwv	1.6 KB
DINT2_OP_rom.dwv	1.2 KB
X_LE_rom.dwv	0.9 KB
Y_LE_rom.dwv	0.9 KB
6502test.dwa	0.3 KB
6502test.tsv	0.3 KB
mc_rom.dwa	0.3 KB
Untitled1.txt	0.2 KB
done_rom.dwa	0.1 KB
microcode.dwa	0.0 KB
Untitled Scrip.dwv	0.0 KB
/Examples/Simulation/Batch Tests/
Gate Test.cct	21.9 KB
Gate Test.tsv	0.2 KB
/.../PROM-PLA Docs/
PLA DWL Help.txt	11.5 KB
PROM Intel Help.txt	2.2 KB
PROM Hex Help.txt	2.0 KB
PLA Raw Help.txt	1.6 KB
/Examples/VHDL/Misc Tests/struct_adder/
adder_small.clf	7.8 KB
fa4.dwv	1.4 KB
vhdl_fa.dwv	0.4 KB
fa4.tsv	0.2 KB
fa4.dwa	0.2 KB
/Libs/Extra Libs/
MakePLD.CLF	5.1 KB
/Examples/VHDL/Misc Tests/
bool_test.dwv	2.2 KB
concat_test.dwv	1.5 KB
multiplier.dwv	1.4 KB
func_test.dwv	1.4 KB
structgate.dwv	1.2 KB
state_test.dwv	1.1 KB
vec_array.dwv	1.0 KB
std_arith_sign_test.dwv	0.9 KB
structtest1.dwv	0.8 KB
time_op_test.dwv	0.8 KB
full_adder_prims.dwv	0.7 KB
bit_op_test.dwv	0.6 KB
COUNT8.dwv	0.6 KB
if_test.dwv	0.6 KB
std_arith_test.dwv	0.6 KB
concat_test.tsv	0.6 KB
int_op_test.dwv	0.6 KB
sig_init_test.dwv	0.5 KB
std_logic_func_test.dwv	0.5 KB
bidir_test.dwv	0.5 KB
block_test.dwv	0.5 KB
vec_array.tsv	0.4 KB
proc_test1.dwv	0.4 KB
bus_test.dwv	0.4 KB
and4b.dwv	0.3 KB
expr_test.dwv	0.3 KB
multiplier.tsv	0.3 KB
int_op_test.tsv	0.3 KB
func_test.dwa	0.3 KB
std_arith_test.tsv	0.3 KB
state_test.dwa	0.2 KB
block_test.dwa	0.2 KB
structtest1sub.dwv	0.2 KB
bool_test.tsv	0.2 KB
func_test.tsv	0.2 KB
bit_op_test.dwa	0.2 KB
bit_op_test.tsv	0.2 KB
COUNT8.tsv	0.2 KB
bidir_test.tsv	0.1 KB
structgate.tsv	0.1 KB
full_adder_prims.tsv	0.1 KB
state_test.tsv	0.1 KB
structtest1sub.dwa	0.1 KB
multiplier.dwa	0.1 KB
std_arith_sign_test.tsv	0.1 KB
structtest1.dwa	0.1 KB
time_op_test.tsv	0.1 KB
and4b.dwa	0.1 KB
structgate.dwa	0.1 KB
COUNT8.dwa	0.1 KB
std_logic_func_test.tsv	0.1 KB
bool_test.dwa	0.1 KB
expr_test.tsv	0.1 KB
bus_test.dwa	0.1 KB
expr_test.dwa	0.1 KB
block_test.tsv	0.1 KB
int_op_test.dwa	0.1 KB
bus_test.tsv	0.1 KB
std_logic_func_test.dwa	0.0 KB
structtest1.tsv	0.0 KB
proc_test1.tsv	0.0 KB
/Scripts/
IOPanel6502.html	1.6 KB
IOPanelDefault.html	0.3 KB
/Examples/VHDL/Yalamanchili/
04_02_memory.dwv	1.4 KB
04_19_state_machine.dwv	1.1 KB
03_08_reg_file.dwv	0.9 KB
03_03_full_adder.dwv	0.6 KB
03_05_mux4.dwv	0.6 KB
03_05_mux4.tsv	0.5 KB
03_08_reg_file.tsv	0.4 KB
03_02_half_adder.dwv	0.4 KB
04_02_memory.tsv	0.3 KB
04_19_state_machine.tsv	0.3 KB
04_19_state_machine.dwa	0.2 KB
03_08_reg_file.dwa	0.2 KB
03_05_mux.tsv	0.2 KB
04_02_memory.dwa	0.2 KB
03_03_full_adder.tsv	0.1 KB
03_05_mux4.dwa	0.1 KB
03_03_full_adder.dwa	0.1 KB
03_02_half_adder.dwa	0.1 KB
03_02_half_adder.tsv	0.1 KB
/Examples/VHDL/Batch Tests/Yalamanchili/
04_02_memory.dwv	1.4 KB
04_19_state_machine.dwv	1.1 KB
03_08_reg_file.dwv	0.9 KB
03_03_full_adder.dwv	0.6 KB
03_05_mux4.dwv	0.6 KB
03_05_mux4.tsv	0.5 KB
03_08_reg_file.tsv	0.4 KB
03_02_half_adder.dwv	0.4 KB
04_02_memory.tsv	0.3 KB
04_19_state_machine.tsv	0.3 KB
04_02_memory.dwa	0.2 KB
03_08_reg_file.dwa	0.2 KB
04_19_state_machine.dwa	0.2 KB
03_05_mux.tsv	0.2 KB
03_03_full_adder.tsv	0.1 KB
03_05_mux4.dwa	0.1 KB
03_03_full_adder.dwa	0.1 KB
03_02_half_adder.dwa	0.1 KB
03_02_half_adder.tsv	0.1 KB
/Export Scripts/
Commercial SPICE Netlist.rfm	1.4 KB
Berkeley SPICE Netlist.rfm	1.4 KB
Project Checker Parts List.rfm	0.9 KB
Parts List.rfm	0.8 KB
Project Checker Netlist.rfm	0.6 KB
Generic PCB Netlist.rfm	0.5 KB
/Examples/VHDL/Batch Tests/Misc Tests/
multiplier.dwv	1.3 KB
func_test.dwv	1.3 KB
structgate.dwv	1.2 KB
state_test.dwv	0.9 KB
structtest1.dwv	0.8 KB
time_op_test.dwv	0.8 KB
full_adder_prims.dwv	0.7 KB
bit_op_test.dwv	0.6 KB
if_test.dwv	0.6 KB
COUNT8.dwv	0.6 KB
int_op_test.dwv	0.6 KB
sig_init_test.dwv	0.5 KB
block_test.dwv	0.5 KB
proc_test1.dwv	0.4 KB
bus_test.dwv	0.4 KB
and4b.dwv	0.3 KB
expr_test.dwv	0.3 KB
multiplier.tsv	0.3 KB
int_op_test.tsv	0.3 KB
state_test.dwa	0.2 KB
block_test.dwa	0.2 KB
structtest1sub.dwv	0.2 KB
func_test.dwa	0.2 KB
func_test.tsv	0.2 KB
bit_op_test.dwa	0.2 KB
bit_op_test.tsv	0.2 KB
COUNT8.tsv	0.2 KB
structgate.tsv	0.1 KB
state_test.tsv	0.1 KB
full_adder_prims.tsv	0.1 KB
structtest1sub.dwa	0.1 KB
structtest1.dwa	0.1 KB
time_op_test.tsv	0.1 KB
COUNT8.dwa	0.1 KB
expr_test.tsv	0.1 KB
expr_test.dwa	0.1 KB
bus_test.dwa	0.1 KB
block_test.tsv	0.1 KB
int_op_test.dwa	0.1 KB
bus_test.tsv	0.1 KB
junk_test.tsv.txt	0.1 KB
structgate.dwa	0.1 KB
structtest1.tsv	0.0 KB
proc_test1.tsv	0.0 KB
/Examples/VHDL/Misc Tests/generic_test1/
generic_top.dwv	1.0 KB
generic_reg.dwv	0.6 KB
generic_reg.tsv	0.2 KB
generic_top.tsv	0.2 KB
generic_top.dwa	0.1 KB
generic_reg.dwa	0.1 KB
/Examples/VHDL/Batch Tests/Misc Tests/generic_test1/
generic_top.dwv	1.0 KB
generic_reg.dwv	0.6 KB
generic_reg.tsv	0.2 KB
generic_top.tsv	0.2 KB
generic_reg.dwa	0.1 KB
generic_top.dwa	0.1 KB
/Examples/VHDL/Batch Tests/Misc Tests/boolean_test/
shift_test.tsv	1.0 KB
shift_test.dwv	0.9 KB
boolean_test.dwv	0.8 KB
boolean_test.tsv	0.6 KB
bool_decl.dwv	0.1 KB
shift_test.dwa	0.1 KB
/Examples/VHDL/Misc Tests/boolean_test/
shift_test.tsv	1.0 KB
shift_test.dwv	0.9 KB
boolean_test.dwv	0.8 KB
boolean_test.tsv	0.6 KB
boolean_test.dwa	0.1 KB
bool_decl.dwv	0.1 KB
shift_test.dwa	0.1 KB
/Examples/VHDL/Batch Tests/
batch.txt	0.8 KB
/.../08_02_full_adder/
full_adder.dwv	0.7 KB
half_adder.dwv	0.4 KB
or_2.dwv	0.2 KB
full_adder.dwa	0.2 KB
full_adder.tsv	0.1 KB
/.../08_02_full_adder/
full_adder.dwv	0.7 KB
half_adder.dwv	0.4 KB
or_2.dwv	0.2 KB
full_adder.tsv	0.1 KB
full_adder.dwa	0.1 KB
/Examples/VHDL/Misc Tests/generic_test2/
generic_test.dwv	0.5 KB
NAND_GATE.dwv	0.4 KB
NAND_GATE1.dwv	0.4 KB
AND_GATE.dwv	0.4 KB
AND_GATE.dwa	0.1 KB
generic_test.dwa	0.1 KB
NAND_GATE.dwa	0.1 KB
generic_test.tsv	0.1 KB
Total files 299