CourseClub Me Coursera FPGA computing systems Background knowledge and introductory materials

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01_course-introduction.en.srt

01_course-introduction.en.txt

01_course-introduction.mp4

01_course-introduction_Course_Introduction.pdf

02_reconfiguration-in-everyday-life.en.srt

02_reconfiguration-in-everyday-life.en.txt

02_reconfiguration-in-everyday-life.mp4

02_reconfiguration-in-everyday-life_Reconfiguration_in_Everyday_Life.pdf

03_the-needs-for-adaptation-an-overview.en.srt

03_the-needs-for-adaptation-an-overview.en.txt

03_the-needs-for-adaptation-an-overview.mp4

03_the-needs-for-adaptation-an-overview_The_Needs_for_Adaptation_an_overview.pdf

04_self-aware-adaptation-in-fpga-based-systems-suggested-readings_instructions.html

04_self-aware-adaptation-in-fpga-based-systems-suggested-readings_stamp.jsp

05_self-awareness-as-a-model-for-designing-and-operating-heterogeneous-multicores_instructions.html

/.../02_fpga-and-reconfiguration/

01_fpga-and-reconfiguration-a-1st-definition.en.srt

01_fpga-and-reconfiguration-a-1st-definition.en.txt

01_fpga-and-reconfiguration-a-1st-definition.mp4

01_fpga-and-reconfiguration-a-1st-definition_FPGA_and_reconfiguration_a_1st_definition.pdf

02_reconfigurable-computing-a-survey-of-systems-and-software-suggested-readings_508352.508353

02_reconfigurable-computing-a-survey-of-systems-and-software-suggested-readings_instructions.html

/.../03_adaptive-computing-systems/

01_runtime-management.en.srt

01_runtime-management.en.txt

01_runtime-management.mp4

01_runtime-management_Runtime_management.pdf

02_reconos-an-operating-system-approach-for-reconfigurable-computing-suggested_instructions.html

02_reconos-an-operating-system-approach-for-reconfigurable-computing-suggested_stamp.jsp

03_r3tos-based-autonomous-fault-tolerant-systems-suggested-readings_instructions.html

03_r3tos-based-autonomous-fault-tolerant-systems-suggested-readings_stamp.jsp

04_programmable-system-on-chip.en.srt

04_programmable-system-on-chip.en.txt

04_programmable-system-on-chip.mp4

04_programmable-system-on-chip_Programmable_System-on-Chip.pdf

05_programmable-system-on-multiple-chip.en.srt

05_programmable-system-on-multiple-chip.en.txt

05_programmable-system-on-multiple-chip.mp4

05_programmable-system-on-multiple-chip_Programmable_System-on-Multiple_Chip.pdf

/.../01_reconfigurable-computing/

01_reconfigurable-computing-a-1st-definition.en.srt

01_reconfigurable-computing-a-1st-definition.en.txt

01_reconfigurable-computing-a-1st-definition.mp4

01_reconfigurable-computing-a-1st-definition_Reconfigurable_Computing_a_1st_definition.pdf

02_reconfigurable-computing-hw-vs-sw.en.srt

02_reconfigurable-computing-hw-vs-sw.en.txt

02_reconfigurable-computing-hw-vs-sw.mp4

02_reconfigurable-computing-hw-vs-sw_Reconfigurable_Computing_HW_vs_SW.pdf

03_on-how-to-improve-the-reconfigurable-computing-performance-via-cad-improvements.en.srt

03_on-how-to-improve-the-reconfigurable-computing-performance-via-cad-improvements.en.txt

03_on-how-to-improve-the-reconfigurable-computing-performance-via-cad-improvements.mp4

03_on-how-to-improve-the-reconfigurable-computing-performance-via-cad-improvements_On_how_to_improve_the_Reconfigurable_computing_perfomance.pdf

04_fpga-based-reconfigurable-computing.en.srt

04_fpga-based-reconfigurable-computing.en.txt

04_fpga-based-reconfigurable-computing.mp4

04_fpga-based-reconfigurable-computing_FPGA-Based_Reconfigurable_Computing.pdf

05_a-platform-independent-runtime-methodology-for-mapping-multiple-applications_instructions.html

05_a-platform-independent-runtime-methodology-for-mapping-multiple-applications_stamp.jsp

06_a-heterogeneous-multicore-system-on-chip-with-run-time-reconfigurable-virtual_instructions.html

06_a-heterogeneous-multicore-system-on-chip-with-run-time-reconfigurable-virtual_stamp.jsp

/.../02_system-design-space-exploration-and-rationale-behind-partial-reconfiguration/

01_system-design-space-exploration-and-rationale-behind-partial-reconfiguration.en.srt

01_system-design-space-exploration-and-rationale-behind-partial-reconfiguration.en.txt

01_system-design-space-exploration-and-rationale-behind-partial-reconfiguration.mp4

01_system-design-space-exploration-and-rationale-behind-partial-reconfiguration_System_design_space_exploration.pdf

02_partitioning-and-scheduling-of-task-graphs-on-partially-dynamically_instructions.html

02_partitioning-and-scheduling-of-task-graphs-on-partially-dynamically_stamp.jsp

03_a-mapping-scheduling-algorithm-for-hardware-acceleration-on-reconfigurable_citation.cfm

03_a-mapping-scheduling-algorithm-for-hardware-acceleration-on-reconfigurable_instructions.html

/.../01_getting-familiar-with-fpgas/

01_getting-familiar-with-fpgas.en.srt

01_getting-familiar-with-fpgas.en.txt

01_getting-familiar-with-fpgas.mp4

01_getting-familiar-with-fpgas_Getting_Familiar_with_FPGAs.pdf

02_fpga-basic-block-clbs-and-iobs.en.srt

02_fpga-basic-block-clbs-and-iobs.en.txt

02_fpga-basic-block-clbs-and-iobs.mp4

02_fpga-basic-block-clbs-and-iobs_FPGA_Basic_Block_CLBs_and_IOBs.pdf

03_fpga-basic-block-interconnections.en.srt

03_fpga-basic-block-interconnections.en.txt

03_fpga-basic-block-interconnections.mp4

03_fpga-basic-block-interconnections_FPGA_Basic_Block_Interconnections.pdf

/.../02_on-how-to-configure-an-fpga/

01_fpga-configuration-an-overview.en.srt

01_fpga-configuration-an-overview.en.txt

01_fpga-configuration-an-overview.mp4

01_fpga-configuration-an-overview_FPGA_Configuration_an_overview.pdf

02_more-details-on-how-to-configure-and-fpga-the-bitstream-files.en.srt

02_more-details-on-how-to-configure-and-fpga-the-bitstream-files.en.txt

02_more-details-on-how-to-configure-and-fpga-the-bitstream-files.mp4

02_more-details-on-how-to-configure-and-fpga-the-bitstream-files_More_Details_on_How_To_Configure_and_FPGA_the_bitstream_files.pdf

03_bitstream-composition.en.srt

03_bitstream-composition.en.txt

03_bitstream-composition.mp4

03_bitstream-composition_Bitstream_Composition.pdf

04_configuration-registers.en.srt

04_configuration-registers.en.txt

04_configuration-registers.mp4

04_configuration-registers_Configuration_Registers.pdf

05_note-on-the-resources_instructions.html

/.../03_how-to-handle-the-complexity-of-an-fpga-based-system/

01_how-to-handle-the-complexity-of-an-fpga-based-system.en.srt

01_how-to-handle-the-complexity-of-an-fpga-based-system.en.txt

01_how-to-handle-the-complexity-of-an-fpga-based-system.mp4

01_how-to-handle-the-complexity-of-an-fpga-based-system_How_to_handle_the_complexity_of_an_FPGA-based_system.pdf

02_physical-design-for-fpgas-suggested-readings_instructions.html

03_multi-million-gate-fpga-physical-design-challenges-suggested-readings_instructions.html

/.../01_an-example-on-how-to-configure-a-clb/

01_4-inputs-1-output-or-lut-configuration-example.en.srt

01_4-inputs-1-output-or-lut-configuration-example.en.txt

01_4-inputs-1-output-or-lut-configuration-example.mp4

01_4-inputs-1-output-or-lut-configuration-example_4_inputs_-_1_output_OR_LUT_configuration_example.pdf

02_from-the-lut-to-the-clb-configuration-example.en.srt

02_from-the-lut-to-the-clb-configuration-example.en.txt

02_from-the-lut-to-the-clb-configuration-example.mp4

02_from-the-lut-to-the-clb-configuration-example_From_the_LUT_to_the_CLB_configuration_example.pdf

/.../02_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga/

01_a-simplified-fpga-and-its-configuration-settings.en.srt

01_a-simplified-fpga-and-its-configuration-settings.en.txt

01_a-simplified-fpga-and-its-configuration-settings.mp4

01_a-simplified-fpga-and-its-configuration-settings_A_simplified_FPGA_and_its_configuration_settings.pdf

02_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga.en.srt

02_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga.en.txt

02_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga.mp4

02_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga_An_Example_on_how_to_implement_a_circuit_on_a_simplified_FPGA.pdf

03_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.en.srt

03_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.en.txt

03_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.mp4

03_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram_An_Example_on_how_to_implement_a_circuit_on_a_simplified_FPGA_bitstram_generation_phase_-_CLBs.pdf

04_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.en.srt

04_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.en.txt

04_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram.mp4

04_an-example-on-how-to-implement-a-circuit-on-a-simplified-fpga-bitstram_An_Example_on_how_to_implement_a_circuit_on_a_simplified_FPGA_bitstram_generation_phase_-_SBs_and_routing.pdf

/.../01_a-common-vocabulary/

01_a-common-vocabulary.en.srt

01_a-common-vocabulary.en.txt

01_a-common-vocabulary.mp4

01_a-common-vocabulary_A_Common_Vocabulary.pdf

/02_the-5-w-s/

01_the-5-w-s.en.srt

01_the-5-w-s.en.txt

01_the-5-w-s.mp4

01_the-5-w-s_The_5_Ws.pdf

/.../03_reconfigurable-computing-as-an-exstension-of-hw-sw-codesing/

01_reconfigurable-computing-as-an-exstension-of-hw-sw-codesing.en.srt

01_reconfigurable-computing-as-an-exstension-of-hw-sw-codesing.en.txt

01_reconfigurable-computing-as-an-exstension-of-hw-sw-codesing.mp4

01_reconfigurable-computing-as-an-exstension-of-hw-sw-codesing_Reconfigurable_Computing_as_an_Exstension_of_HWSW_Codesing.pdf

02_design-methodology-for-partial-dynamic-reconfiguration-a-new-degree-of-freedom_instructions.html

02_design-methodology-for-partial-dynamic-reconfiguration-a-new-degree-of-freedom_stamp.jsp

/.../04_a-classification-of-reconfigurations/

01_a-classification-of-soc-reconfigurations.en.srt

01_a-classification-of-soc-reconfigurations.en.txt

01_a-classification-of-soc-reconfigurations.mp4

01_a-classification-of-soc-reconfigurations_A_Classification_of_SoC_Reconfigurations.pdf

02_a-classification-of-somc-reconfigurations.en.srt

02_a-classification-of-somc-reconfigurations.en.txt

02_a-classification-of-somc-reconfigurations.mp4

02_a-classification-of-somc-reconfigurations_A_Classification_of_SoMC_Reconfigurations.pdf

03_performance-of-partial-reconfiguration-in-fpga-systems-a-survey-and-a-cost-model_citation.cfm

03_performance-of-partial-reconfiguration-in-fpga-systems-a-survey-and-a-cost-model_instructions.html

/.../01_reconfigurable-systems-opportunities-and-rationale/

01_scenarios-where-partial-reconfiguration-can-be-effective.en.srt

01_scenarios-where-partial-reconfiguration-can-be-effective.en.txt

01_scenarios-where-partial-reconfiguration-can-be-effective.mp4

01_scenarios-where-partial-reconfiguration-can-be-effective_Scenarios_where_Partial_Reconfiguration_can_be_effective.pdf

02_how-to-use-fpga-reconfiguration-to-face-area-issues.en.srt

02_how-to-use-fpga-reconfiguration-to-face-area-issues.en.txt

02_how-to-use-fpga-reconfiguration-to-face-area-issues.mp4

02_how-to-use-fpga-reconfiguration-to-face-area-issues_How_to_use_FPGA_Reconfiguration_to_face_area_issues.pdf

/.../01_xilnx-design-flows-through-years/

01_xilnx-design-flows-through-years.en.srt

01_xilnx-design-flows-through-years.en.txt

01_xilnx-design-flows-through-years.mp4

01_xilnx-design-flows-through-years_Xilnx_Design_Flows_through_years.pdf

/.../02_xilinx-partial-reconfiguration-design-flows/

01_partial-reconfiguration-design-flows.en.srt

01_partial-reconfiguration-design-flows.en.txt

01_partial-reconfiguration-design-flows.mp4

01_partial-reconfiguration-design-flows_Partial_Reconfiguration_Design_Flows.pdf

02_xilinx-difference-based-partial-reconfiguration.en.srt

02_xilinx-difference-based-partial-reconfiguration.en.txt

02_xilinx-difference-based-partial-reconfiguration.mp4

02_xilinx-difference-based-partial-reconfiguration_Xilinx_Difference_Based_Partial_Reconfiguration.pdf

03_xilinx-module-based-partial-reconfiguration.en.srt

03_xilinx-module-based-partial-reconfiguration.en.txt

03_xilinx-module-based-partial-reconfiguration.mp4

03_xilinx-module-based-partial-reconfiguration_Xilinx_Module_Based_Partial_Reconfiguration.pdf

04_xilinx-partial-reconfiguration-pr-flow.en.srt

04_xilinx-partial-reconfiguration-pr-flow.en.txt

04_xilinx-partial-reconfiguration-pr-flow.mp4

04_xilinx-partial-reconfiguration-pr-flow_Xilinx_Partial_Reconfiguration_PR_Flow.pdf

05_moudle-based-vs-partial-reconfiguration-design-flows.en.srt

05_moudle-based-vs-partial-reconfiguration-design-flows.en.txt

05_moudle-based-vs-partial-reconfiguration-design-flows.mp4

05_moudle-based-vs-partial-reconfiguration-design-flows_Moudle_Based_vs_Partial_Reconfiguration_Design_Flows.pdf

06_vivado-design-suite-tutorial-partial-reconfiguration-ug947-v2016-1-april-6-2016_instructions.html

06_vivado-design-suite-tutorial-partial-reconfiguration-ug947-v2016-1-april-6-2016_ug947-vivado-partial-reconfiguration-tutorial.pdf

07_vivado-design-suite-user-guide-partial-reconfiguration-ug909-v2016-1-april-6_instructions.html

07_vivado-design-suite-user-guide-partial-reconfiguration-ug909-v2016-1-april-6_ug909-vivado-partial-reconfiguration.pdf

/.../03_politecnico-di-milano-partial-reconfiguration-research-initiatives/

01_rationale-behind-dresd-and-the-work-done-by-the-politecnico-di-milano.en.srt

01_rationale-behind-dresd-and-the-work-done-by-the-politecnico-di-milano.en.txt

01_rationale-behind-dresd-and-the-work-done-by-the-politecnico-di-milano.mp4

01_rationale-behind-dresd-and-the-work-done-by-the-politecnico-di-milano_Rationale_behind_DRESD_and_the_work_done_by_the_Politecnico_di_Milano.pdf

02_dynamic-reconfigurability-in-embedded-system-design-suggested-readings_instructions.html

02_dynamic-reconfigurability-in-embedded-system-design-suggested-readings_stamp.jsp

03_a-design-methodology-for-dynamic-reconfiguration-the-caronte-architecture_instructions.html

03_a-design-methodology-for-dynamic-reconfiguration-the-caronte-architecture_stamp.jsp

04_from-dresd-to-change-and-asap-two-new-research-initiatives-from-the-politecnico.en.srt

04_from-dresd-to-change-and-asap-two-new-research-initiatives-from-the-politecnico.en.txt

04_from-dresd-to-change-and-asap-two-new-research-initiatives-from-the-politecnico.mp4

04_from-dresd-to-change-and-asap-two-new-research-initiatives-from-the-politecnico_From_DRESD_to_CHANGE_and_ASAP_two_new_research_initiatives_from_the_Politecnico_di_Milano.pdf

05_floorplanning-automation-for-partial-reconfigurable-fpgas-via-feasible_instructions.html

05_floorplanning-automation-for-partial-reconfigurable-fpgas-via-feasible_stamp.jsp

06_caos-from-embedded-to-heterogeneous-distributed-fpga-based-computing-systems.en.srt

06_caos-from-embedded-to-heterogeneous-distributed-fpga-based-computing-systems.en.txt

06_caos-from-embedded-to-heterogeneous-distributed-fpga-based-computing-systems.mp4

06_caos-from-embedded-to-heterogeneous-distributed-fpga-based-computing-systems_CAOS_from_embeded_to_heterogeneous_distributed_FPGA-based_computing_systems.pdf

07_heterogeneous-exascale-supercomputing-the-role-of-cad-in-the-exafpga-project_instructions.html

07_heterogeneous-exascale-supercomputing-the-role-of-cad-in-the-exafpga-project_stamp.jsp

08_the-role-of-cad-frameworks-in-heterogeneous-fpga-based-cloud-systems-suggested_instructions.html

08_the-role-of-cad-frameworks-in-heterogeneous-fpga-based-cloud-systems-suggested_stamp.jsp

/.../01_towards-distributed-fpga-based-systems/

01_towards-distributed-fpga-based-systems.en.srt

01_towards-distributed-fpga-based-systems.en.txt

01_towards-distributed-fpga-based-systems.mp4

01_towards-distributed-fpga-based-systems_Towards_distributed_FPGA-based_systems.pdf

02_virtualized-execution-runtime-for-fpga-accelerators-in-the-cloud-suggested_instructions.html

03_a-cloud-scale-acceleration-architecture-suggested-readings_instructions.html

03_a-cloud-scale-acceleration-architecture-suggested-readings_stamp.jsp

04_enabling-flexible-network-fpga-clusters-in-a-heterogeneous-cloud-data-center_citation.cfm

04_enabling-flexible-network-fpga-clusters-in-a-heterogeneous-cloud-data-center_instructions.html

/.../01_intel-arria-10-device-overview-2017-03-15/

01__a10_overview.pdf

01__resources.html

/.../02_virtex-ii-pro-fpga-ug012-v4-1/

01__resources.html

01__ug012.pdf

/.../03_virtex-5-fpga-user-guide-ug190-v5-4/

01__resources.html

01__ug190.pdf

/.../04_virtex-5-fpga-configuration-ug191-v3-12/

01__resources.html

01__ug191.pdf

/.../05_virtex-6-fpga-configuration-ug360-v3-9/

01__resources.html

01__ug360.pdf

/.../06_7-series-fpgas-configuration-ug470-v1-11/

01__resources.html

01__ug470_7Series_Config.pdf

/.../07_7-series-fpgas-clb-ug474-v1-8/

01__resources.html

01__ug474_7Series_CLB.pdf

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