DevCourseWeb com Udemy FPGA Field Programmable Gate Array Design and Implementation |
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Name |
[ DevCourseWeb.com ] Udemy - FPGA (Field-Programmable Gate Array) Design and Implementation |
DOWNLOAD Copy Link |
Total Size |
4.3 GB |
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Total Files |
66 |
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Last Seen |
2024-07-08 23:56 |
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Hash |
0CC8597E7220C00293D56C10ACBCA2591E63E004 |
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0.2 KB |
/.../01 - Introduction to FPGA (Field Programmable Gate Arrays)/ |
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2.4 MB |
001 Introduction to FPGA (Field Programmable Gate Arrays).mp4 |
192.1 MB |
/.../02 - FPGA Testing/ |
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1.2 MB |
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98.0 MB |
/.../03 - FPGA Design Flows & Design Tools/ |
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903.8 KB |
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285.8 MB |
/.../04 - FPGA Design using Verilog/ |
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1.7 MB |
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115.5 MB |
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571.5 KB |
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111.3 MB |
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431.0 KB |
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97.3 MB |
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532.2 KB |
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119.6 MB |
005 8-FPGA-Design-using-Verilog-VHDL-Design-using-Verilog.pdf |
1.1 MB |
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101.4 MB |
006 9-FPGA-Design-using-Verilog-Visual-Verification-of-Designs.pdf |
697.3 KB |
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165.7 MB |
007 10-FPGA-Design-using-Verilog-Finite-State-Machines-part-1.pdf |
923.3 KB |
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132.3 MB |
008 11-FPGA-Design-using-Verilog-Finite-State-Machines-part-2.pdf |
757.9 KB |
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153.1 MB |
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932.4 KB |
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226.6 MB |
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921.7 KB |
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102.4 MB |
011 14-FPGA-Design-using-Verilog-SystemVerilog-for-Synthesis.pdf |
355.9 KB |
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100.1 MB |
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321.9 KB |
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42.2 MB |
/.../05 - Simulate and Implement SOPC Design/ |
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1.9 MB |
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198.1 MB |
/.../06 - Reading Data from Peripherals/ |
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480.9 KB |
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53.1 MB |
/.../07 - UART SDRAM Python/ |
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2.3 MB |
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132.5 MB |
/.../08 - Script execution in Quartus and ModelSim NIOS/ |
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1.0 MB |
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101.4 MB |
/.../09 - Image Processing using FPGA/ |
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2.1 MB |
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179.7 MB |
/.../10 - Challenges in using FPAA FPGA in Mixed Signal Technology/ |
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001 21-Challenges-in-using-FPAA-FPGA-in-Mixed-Signal-Technology.pdf |
689.3 KB |
001 Challenges in using FPAA FPGA in Mixed Signal Technology.mp4 |
28.7 MB |
/11 - Protoflex/ |
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2.6 MB |
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123.6 MB |
/.../12 - Reconfigurable Hardware/ |
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3.2 MB |
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209.9 MB |
/.../13 - Wordcount using MapReduce for FPGA/ |
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1.2 MB |
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109.6 MB |
/.../14 - FPGA implementation of DSP Circuits/ |
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986.5 KB |
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149.7 MB |
/.../15 - Reversible Logic Circuits/ |
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3.9 MB |
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143.4 MB |
/.../16 - FPGA implementation of Divider in Finite Field/ |
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657.5 KB |
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55.7 MB |
/.../17 - Principles of PLI/ |
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400.5 KB |
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72.6 MB |
/.../18 - Spartan FPGA implementation/ |
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965.2 KB |
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65.1 MB |
/.../19 - Programmable Chips and Boards/ |
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2.6 MB |
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163.7 MB |
/.../20 - Memristive FPGA/ |
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3.2 MB |
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215.6 MB |
/.../21 - Mentor Graphics Tools & Guidelines/ |
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1.2 MB |
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184.3 MB |
/~Get Your Files Here !/ |
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0.4 KB |
Total files 66 |
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