FPGA Development in VHDL Beyond the Basics | 695E369F482D8BBFDA78EACDC5FE9605E4FF2D28

FPGA Development in VHDL Beyond the Basics

Name	FPGA Development in VHDL - Beyond the Basics	DOWNLOAD Copy Link
Total Size	541.2 MB
Total Files	91
Hash	695E369F482D8BBFDA78EACDC5FE9605E4FF2D28

/03.Working with Custom Data Types/
09.Summary.srt	0.8 KB
01.Overview.srt	1.3 KB
04.Subtypes.srt	1.5 KB
05.Multidimensional Arrays.srt	1.8 KB
06.Record Types.srt	2.6 KB
07.Physical Types.srt	3.1 KB
02.Standard Data Types Recap.srt	5.2 KB
03.Arrays and Ranges.srt	6.9 KB
08.Demo.srt	20.4 KB
09.Summary.mp4	1.2 MB
01.Overview.mp4	1.4 MB
05.Multidimensional Arrays.mp4	2.3 MB
04.Subtypes.mp4	2.4 MB
06.Record Types.mp4	3.2 MB
07.Physical Types.mp4	4.3 MB
02.Standard Data Types Recap.mp4	6.5 MB
03.Arrays and Ranges.mp4	10.8 MB
08.Demo.mp4	84.1 MB
/07.Testing Your Designs/
05.Summary.srt	1.0 KB
01.Overview.srt	1.1 KB
02.Testing and Testbenches.srt	7.0 KB
03.A Sample Testbench.srt	10.0 KB
04.Testing with VUnit.srt	13.4 KB
01.Overview.mp4	1.1 MB
05.Summary.mp4	1.2 MB
02.Testing and Testbenches.mp4	8.1 MB
03.A Sample Testbench.mp4	26.7 MB
04.Testing with VUnit.mp4	30.8 MB
/04.Monitoring Signal States with Attributes/
01.Overview.srt	1.1 KB
06.Type Kind Attributes.srt	1.1 KB
02.What Are Attributes.srt	1.4 KB
08.Summary.srt	1.7 KB
05.Signal Kind Attributes.srt	2.7 KB
07.User-defined Attributes.srt	3.5 KB
03.Value Kind Attributes.srt	5.5 KB
04.Function Kind Attributes.srt	11.3 KB
01.Overview.mp4	1.2 MB
02.What Are Attributes.mp4	1.4 MB
06.Type Kind Attributes.mp4	1.5 MB
08.Summary.mp4	2.6 MB
05.Signal Kind Attributes.mp4	4.0 MB
07.User-defined Attributes.mp4	4.5 MB
03.Value Kind Attributes.mp4	7.5 MB
04.Function Kind Attributes.mp4	15.8 MB
/06.Constructing State Machines/
07.Summary.srt	1.1 KB
03.State Machine Types.srt	1.2 KB
01.Overview.srt	1.4 KB
02.What Is a State Machine.srt	2.2 KB
06.State Encoding Styles.srt	8.8 KB
04.Demo - Traffic Lights (Moore).srt	11.0 KB
05.Demo - Combination Lock (Mealy).srt	17.8 KB
03.State Machine Types.mp4	1.3 MB
01.Overview.mp4	1.4 MB
07.Summary.mp4	1.9 MB
02.What Is a State Machine.mp4	2.8 MB
06.State Encoding Styles.mp4	13.9 MB
04.Demo - Traffic Lights (Moore).mp4	41.5 MB
05.Demo - Combination Lock (Mealy).mp4	62.8 MB
/05.Keeping Code Organized with Subprograms and Packages/
07.Summary.srt	1.4 KB
01.Overview.srt	1.5 KB
02.Design Unit Recap.srt	3.2 KB
04.Constants.srt	3.8 KB
03.Procedures.srt	8.5 KB
05.Generics.srt	13.5 KB
06.Resolution Functions.srt	13.8 KB
01.Overview.mp4	1.5 MB
07.Summary.mp4	1.6 MB
02.Design Unit Recap.mp4	4.4 MB
04.Constants.mp4	5.0 MB
03.Procedures.mp4	10.9 MB
06.Resolution Functions.mp4	42.9 MB
05.Generics.mp4	50.4 MB
/02.Developing for the FPGA/
02.Module Overview.srt	1.5 KB
08.Summary.srt	1.5 KB
06.High-level Synthesis.srt	3.2 KB
01.Course Overview.srt	3.4 KB
03.VHDL Design Flow.srt	3.8 KB
04.Compilation Process.srt	4.3 KB
07.Demo - MATLAB HDL Coder.srt	9.3 KB
05.Demo - Compilation Report.srt	9.4 KB
02.Module Overview.mp4	1.6 MB
08.Summary.mp4	2.0 MB
01.Course Overview.mp4	3.6 MB
03.VHDL Design Flow.mp4	3.6 MB
06.High-level Synthesis.mp4	4.4 MB
04.Compilation Process.mp4	5.6 MB
07.Demo - MATLAB HDL Coder.mp4	23.5 MB
05.Demo - Compilation Report.mp4	26.8 MB
/01.Course Overview/
01.Course Overview.srt	2.0 KB
01.Course Overview.mp4	3.8 MB
/
fpga-vhdl-beyond-basics.zip	859.9 KB
Total files 91